Add/Subtract Packed Double-Precision Floating-Point Values

Encoding

EncodingOperand 1Operand 2Operand 3
rmModRM.reg[rw]ModRM.r/m[r]
rvmModRM.reg[rw]VEX.vvvv[r]ModRM.r/m[r]

Description

The (V)ADDSUBPD instruction adds/subtracts double-precision floating-point value from the two source operands. The result is stored in the destination operand.

This instruction's "add/subtract" operation subtracts even offset and adds odd offset fields in the SIMD register.

All forms except the legacy SSE one will zero the upper (untouched) bits.

Operation

public void ADDSUBPD(SimdF64 dest, SimdF64 src)
{
    dest[0] -= src[0];
    dest[1] += src[1];
    // dest[2..] is unmodified
}

public void VADDSUBPD_Vex128(SimdF64 dest, SimdF64 src1, SimdF64 src2)
{
    dest[0] -= src[0];
    dest[1] += src[1];
    dest[2..] = 0;
}

public void VADDSUBPD_Vex256(SimdF64 dest, SimdF64 src1, SimdF64 src2)
{
    dest[0] -= src[0];
    dest[1] += src[1];
    dest[2] -= src[2];
    dest[3] += src[3];
    dest[4..] = 0;
}

Intrinsics

Exceptions

SIMD Floating-Point

#XM
  • #D - Denormal operand.
  • #I - Invalid operation.
  • #O - Numeric overflow.
  • #P - Inexact result.
  • #U - Numeric underflow.

Other Exceptions

VEX Encoded Form: See Type 2 Exception Conditions.

#GP(0)
  • If a memory operand is not aligned to a 16 byte boundary.