Perform One Round of AES Encryption

Encoding

EncodingOperand 1Operand 2Operand 3Operand 4
rmn/aModRM.reg[rw]ModRM.r/m[r]
rvmn/aModRM.reg[rw]VEX.vvvv[r]ModRM.r/m[r]
ervmfull-memModRM.reg[rw]EVEX.vvvvv[r]ModRM.r/m[r]

Description

The (V)AESENC instruction performs a single round of AES encryption using one, two, or four 128 bit states from the first source operand using 128 bit round keys from the second source operand. The result is stored in in the destination operand.

Due to the nature of AES, this instruction must be used for all but the last encryption round. For that last round, use the AESENCLAST (Perform Last Round of AES Encryption) instruction.

All forms except the legacy SSE one will zero the upper (untouched) bits.

Operation

public void AESENC(SimdU128 dest, SimdU128 src)
{
    U128 state = dest[0];
    state = AesShiftRows(state);
    state = AesSubBytes(state);
    state = AesMixColumns(state);
    dest[0] = state ^ src[0];
    // dest[1..] is unmodified
}

void VAESENC(SimdU128 dest, SimdU128 src1, SimdU128 src2, int kl)
{
    for (int n = 0; n < kl; n++)
    {
        U128 state = src1[n];
        state = AesShiftRows(state);
        state = AesSubBytes(state);
        state = AesMixColumns(state);
        dest[n] = state ^ src2[n];
    }
    dest[kl..] = 0;
}

public void VAESENC_Vex128(SimdU128 dest, SimdU128 src1, SimdU128 src2) =>
    VAESENC(dest, src1, src2, 1);
public void VAESENC_Vex256(SimdU128 dest, SimdU128 src1, SimdU128 src2) =>
    VAESENC(dest, src1, src2, 2);

public void VAESENC_Evex128(SimdU128 dest, SimdU128 src1, SimdU128 src2) =>
    VAESENC(dest, src1, src2, 1);
public void VAESENC_Evex256(SimdU128 dest, SimdU128 src1, SimdU128 src2) =>
    VAESENC(dest, src1, src2, 2);
public void VAESENC_Evex512(SimdU128 dest, SimdU128 src1, SimdU128 src2) =>
    VAESENC(dest, src1, src2, 4);

Intrinsics

Exceptions

SIMD Floating-Point

None.

Other Exceptions

VEX Encoded Form: See Type 4 Exception Conditions.
EVEX Encoded Form: See Type E4NF Exception Conditions.