Opcode | Encoding | 16-bit | 32-bit | 64-bit | Description |
---|---|---|---|---|---|
63 /r ARPL r/m16, r16 | mr | Invalid | Valid | N/E | Adjust the RPL field (bits 0 and 1) of r/m16 to be greater than or equal to the RPL field of r16. |
Encoding
Encoding | Operand 1 | Operand 2 |
---|---|---|
mr | ModRM.r/m[rw] | ModRM.reg[r] |
Description
The ARPL
instruction compares the RPL
(requested privilege level) field (bits 0 and 1) of two segment selectors. The the RPL
field of the destination operand is less than the RPL
field of the source operand, ZF
is set, and the RPL
field of the destination is increased to match the source's. Otherwise, ZF
is cleared and no change to the destination occurs.
This instruction is not encodable in Long Mode, and, if encountered, will be interpreted as MOVSXD
.
Operation
public void ARPL(U16 dest, U16 src)
{
if (dest.Bit[0..=1] < src.Bit[0..=1])
dest.Bit[0..=1] = src.Bit[0..=1];
}
Flags Affected
CF
(carry flag)- Unmodified.
PF
(parity flag)- Unmodified.
AF
(auxiliary flag)- Unmodified.
ZF
(zero flag)- Set if an adjustment is made. Cleared otherwise.
SF
(sign flag)- Unmodified.
OF
(overflow flag)- Unmodified.
Exceptions
Exception | Mode | Cause of Exception | ||
---|---|---|---|---|
Real Mode | Virtual 8086 | Protected and Compatibility | ||
#UD | X | X | If in Real or Virtual-8086 Mode. | |
X | If the LOCK prefix is used. | |||
#SS(0) | X | If a memory operand using the SS segment has an effective address that is outside the SS segment's limit. | ||
#GP(0) | X | If the destination is located in a non-writable segment. | ||
X | If a memory operand uses a segment containing a NULL selector. | |||
X | If a memory operand (using a segment other than SS ) has an effective address that is outside the segment's limit. | |||
#PF(fc) | X | If a page fault occurs. | ||
#AC(0) | X | If alignment checking is enabled while the current privilege level is 3 and an unaligned memory access is made. |