Move Bounds | Arch86

Opcode	Encoding	16 bit	32 bit	64 bit	`CPUID` Feature Flag(s)	Description
`66 0F 1A /r` `BNDMOV bnd1, bnd2/m64`	`rm`	Valid	Valid	N/E	`mpx`	Move a lower and upper bound from bnd2/m64 into bnd1.
Opcode: `66 0F 1A /r` Mnemonic: `BNDMOV bnd1, bnd2/m64` Encoding: `rm` Validity (16/32/64 bit): valid, valid, N/E `CPUID` Feature Flag(s): `mpx` Move a lower and upper bound from bnd2/m64 into bnd1.
`66 0F 1A /r` `BNDMOV bnd1, bnd2/m128`	`rm`	N/E	N/E	Valid	`mpx`	Move a lower and upper bound from bnd2/m128 into bnd1.
Opcode: `66 0F 1A /r` Mnemonic: `BNDMOV bnd1, bnd2/m128` Encoding: `rm` Validity (16/32/64 bit): N/E, N/E, valid `CPUID` Feature Flag(s): `mpx` Move a lower and upper bound from bnd2/m128 into bnd1.
`66 0F 1B /r` `BNDMOV bnd1/m64, bnd2`	`mr`	Valid	Valid	N/E	`mpx`	Move a lower and upper bound from bnd2 into bnd1/m64.
Opcode: `66 0F 1B /r` Mnemonic: `BNDMOV bnd1/m64, bnd2` Encoding: `mr` Validity (16/32/64 bit): valid, valid, N/E `CPUID` Feature Flag(s): `mpx` Move a lower and upper bound from bnd2 into bnd1/m64.
`66 0F 1B /r` `BNDMOV bnd1/m128, bnd2`	`mr`	N/E	N/E	Valid	`mpx`	Move a lower and upper bound from bnd2 into bnd1/m128.
Opcode: `66 0F 1B /r` Mnemonic: `BNDMOV bnd1/m128, bnd2` Encoding: `mr` Validity (16/32/64 bit): N/E, N/E, valid `CPUID` Feature Flag(s): `mpx` Move a lower and upper bound from bnd2 into bnd1/m128.

Encoding

Encoding	Operand 1	Operand 2
`rm`	`ModRM.reg[w]`	`ModRM.r/m[r]`
`mr`	`ModRM.r/m[w]`	`ModRM.reg[r]`

Description

The BNDMOV instruction moves a pair of lower and upper bounds from the source operand into the destination operand.

Which instruction form is used depends on the operating mode of the processor. In 16 bit and 32 bit modes, the 32 bit form is used (64 bit are moved). In 64 bit mode, the 64 bit form is used (128 bits are moved).

This instruction can be used with the LOCK prefix to allow atomic exectution.

Operation

public void BNDMOV(ref Bound dest, Bound src)
{
    dest = src;
}

Flags Affected

None.

Intrinsics

void *_bnd_copy_ptr_bounds(const void *dest, const void *src)

Exceptions

Real-Address Mode

#UD

If the LOCK prefix is used, but the destination is not a memory operand.
If 16 bit addressing is used, or 32 or 64 bit addressing is used, but without an SIB byte (rm is not 100b).
If a register operand encodes BND4 through BND7.

#SS(0)

If a memory operand using the SS segment has an effective address that is outside the SS segment's limit.

#GP(0)

If a memory operand (using a segment other than SS) has an effective address that is outside the segment's limit.

Virtual-8086 Mode

#UD

If the LOCK prefix is used, but the destination is not a memory operand.
If 16 bit addressing is used, or 32 or 64 bit addressing is used, but without an SIB byte (rm is not 100b).
If a register operand encodes BND4 through BND7.

#SS(0)

If a memory operand using the SS segment has an effective address that is outside the SS segment's limit.

#GP(0)

If a memory operand (using a segment other than SS) has an effective address that is outside the segment's limit.

#PF(fc)

If a page fault occurs.

#AC(0)

If alignment checking is enabled while the current privilege level is 3 and an unaligned memory access is made.

Protected Mode

#UD

If the LOCK prefix is used, but the destination is not a memory operand.
If 16 bit addressing is used, or 32 or 64 bit addressing is used, but without an SIB byte (rm is not 100b).
If a register operand encodes BND4 through BND7.

#SS(0)

If a memory operand using the SS segment has an effective address that is outside the SS segment's limit.

#GP(0)

If the destination is located in a non-writable segment.
If a memory operand uses a segment containing a NULL selector.
If a memory operand (using a segment other than SS) has an effective address that is outside the segment's limit.

#PF(fc)

If a page fault occurs.

#AC(0)

If alignment checking is enabled while the current privilege level is 3 and an unaligned memory access is made.

Compatibility Mode

#UD

If the LOCK prefix is used, but the destination is not a memory operand.
If 16 bit addressing is used, or 32 or 64 bit addressing is used, but without an SIB byte (rm is not 100b).
If a register operand encodes BND4 through BND7.

#SS(0)

If a memory operand using the SS segment has an effective address that is outside the SS segment's limit.

#GP(0)

If the destination is located in a non-writable segment.
If a memory operand uses a segment containing a NULL selector.
If a memory operand (using a segment other than SS) has an effective address that is outside the segment's limit.

#PF(fc)

If a page fault occurs.

#AC(0)

If alignment checking is enabled while the current privilege level is 3 and an unaligned memory access is made.

Long Mode

#UD

If the LOCK prefix is used, but the destination is not a memory operand.
If 16 bit addressing is used, or 32 or 64 bit addressing is used, but without an SIB byte (rm is not 100b).
If a register operand encodes BND4 through BND15.

#SS(0)

If a memory operand using the SS segment is in non-canonical form.
If a memory operand using the SS segment has an effective address that is outside the SS segment's limit.

#GP(0)

If a memory operand (using a segment other than SS) is in non-canonical form.
If a memory operand uses a segment containing a NULL selector.
If a memory operand (using a segment other than SS) has an effective address that is outside the segment's limit.

#PF(fc)

If a page fault occurs.

#AC(0)

If alignment checking is enabled while the current privilege level is 3 and an unaligned memory access is made.