Arch86

Opcode	Encoding	16-bit	32-bit	64-bit	`CPUID` Feature Flag(s)	Description
`F2 0F 5A /r` `CVTSD2SS xmm1, xmm2/m64`	`rm`	Invalid	Valid	Valid	`sse2`	Convert a scalar double-precision floating-point value from xmm2/m64 into a scalar single-precision floating-point value. Store the result in xmm1.
Opcode: `F2 0F 5A /r` Mnemonic: `CVTSD2SS xmm1, xmm2/m64` Encoding: `rm` Validity (16/32/64 bit): invalid, valid, valid `CPUID` Feature Flag(s): `sse2` Convert a scalar double-precision floating-point value from xmm2/m64 into a scalar single-precision floating-point value. Store the result in xmm1.
`VEX.LIG.F2.0F.WIG 5A /r` `VCVTSD2SS xmm1, xmm2, xmm3/m64`	`rvm`	Invalid	Valid	Valid	`avx`	Convert a scalar double-precision floating-point value from xmm3/m64 into a scalar single-precision floating-point value. Merge the upper bits of the result with those in xmm2. Store the result in xmm1.
Opcode: `VEX.LIG.F2.0F.WIG 5A /r` Mnemonic: `VCVTSD2SS xmm1, xmm2, xmm3/m64` Encoding: `rvm` Validity (16/32/64 bit): invalid, valid, valid `CPUID` Feature Flag(s): `avx` Convert a scalar double-precision floating-point value from xmm3/m64 into a scalar single-precision floating-point value. Merge the upper bits of the result with those in xmm2. Store the result in xmm1.
`EVEX.LLIG.F2.0F.W1 5A /r` `VCVTSD2SS xmm1 {k1}{z}, xmm2, xmm3/m64{er}`	`ervm`	Invalid	Valid	Valid	`avx`	Convert a scalar double-precision floating-point value from xmm3/m64 into a scalar single-precision floating-point value. Merge the upper bits of the result with those in xmm2. Store the result in xmm1.
Opcode: `EVEX.LLIG.F2.0F.W1 5A /r` Mnemonic: `VCVTSD2SS xmm1 {k1}{z}, xmm2, xmm3/m64{er}` Encoding: `ervm` Validity (16/32/64 bit): invalid, valid, valid `CPUID` Feature Flag(s): `avx` Convert a scalar double-precision floating-point value from xmm3/m64 into a scalar single-precision floating-point value. Merge the upper bits of the result with those in xmm2. Store the result in xmm1.

Encoding

Encoding	Operand 1	Operand 2	Operand 3
`rm`	`n/a`	`ModRM.reg[w]`	`ModRM.r/m[r]`
`rvm`	`n/a`	`ModRM.reg[w]`	`VEX.vvvv[r]`	`ModRM.r/m[r]`
`ervm`	`tuple1-scalar`	`ModRM.reg[w]`	`EVEX.vvvvv[r]`	`ModRM.r/m[r]`

Description

The (V)CVTSD2SS instruction converts a scalar double-precision floating-point value from the source operand to a scalar single-precision floating-point value. The result is stored in the destination operand.

The VEX and EVEX forms will copy bits 32..127 from the first source operand into the destination. All forms except the legacy SSE one will zero the upper (untouched) bits.

Operation

public void CVTSD2SS(SimdF32 dest, SimdF64 src)
{
    dest[0] = ConvertToF32(src[0]);
    // dest[1..] is unmodified
}

public void VCVTSD2SS_Vex(SimdF32 dest, SimdF32 src1, SimdF64 src2)
{
    dest[0] = ConvertToF32(src2[0]);
    dest[1] = src1[1];
    dest[2] = src1[2];
    dest[3] = src1[3];
    dest[4..] = 0;
}

public void VCVTSD2SS_EvexMemory(SimdF32 dest, SimdF32 src1, SimdF64 src2, KMask k)
{
    if (k[0])
        dest[0] = ConvertToF32(src2[0]);
    else if (EVEX.z)
        dest[0] = 0;
    // otherwise unchanged
    dest[1] = src1[1];
    dest[2] = src1[2];
    dest[3] = src1[3];
    dest[4..] = 0;
}

public void VCVTSD2SS_EvexRegister(SimdF32 dest, SimdF32 src1, SimdF64 src2, KMask k)
{
    if (EVEX.b)
        OverrideRoundingModeForThisInstruction(EVEX.rc);

    if (k[0])
        dest[0] = ConvertToF32(src2[0]);
    else if (EVEX.z)
        dest[0] = 0;
    // otherwise unchanged
    dest[1] = src1[1];
    dest[2] = src1[2];
    dest[3] = src1[3];
    dest[4..] = 0;
}

Intrinsics

__m128 _mm_cvtsd_ss(__m128 a, __m128d b)
__m128 _mm_cvt_roundsd_ss(__m128 a, __m128d b, const int rounding)
__m128 _mm_mask_cvtsd_ss(__m128 s, __mmask8 k, __m128 a, __m128d b)
__m128 _mm_mask_cvt_roundsd_ss(__m128 s, __mmask8 k, __m128 a, __m128d b, const int rounding)
__m128 _mm_maskz_cvtsd_ss(__mmask8 k, __m128 a,__m128d b)
__m128 _mm_maskz_cvt_roundsd_ss(__mmask8 k, __m128 a,__m128d b, const int rounding)

Exceptions

SIMD Floating-Point

#XM

#D - Denormal operand.
#I - Invalid operation.
#O - Numeric overflow.
#P - Inexact result.
#U - Numeric underflow.

Other Exceptions

VEX Encoded Form: See Type 3 Exception Conditions.
EVEX Encoded Form: See Type E3 Exception Conditions.