Arch86

Opcode	Encoding	16-bit	32-bit	64-bit	Description
`F6 /6` `DIV r/m8`	`m`	Valid	Valid	Valid	Perform an unsigned divide of `AX` by r/m8. Store the quotient in `AL` and the remainder in `AH`.
Opcode: `F6 /6` Mnemonic: `DIV r/m8` Encoding: `m` Validity (16/32/64 bit): valid, valid, valid Perform an unsigned divide of `AX` by r/m8. Store the quotient in `AL` and the remainder in `AH`.
`REX F6 /6` `DIV r/m8^*`	`m`	N/E	N/E	Valid	Perform an unsigned divide of `AX` by r/m8. Store the quotient in `AL` and the remainder in `AH`. This uses the alterate `gpr8` encoding.
Opcode: `REX F6 /6` Mnemonic: `DIV r/m8^` Encoding:* `m` Validity (16/32/64 bit): N/E, N/E, valid Perform an unsigned divide of `AX` by r/m8. Store the quotient in `AL` and the remainder in `AH`. This uses the alterate `gpr8` encoding.
`F7 /6` `DIV r/m16`	`m`	Valid	Valid	Valid	Perform an unsigned divide of `DX:AX` by r/m16. Store the quotient in `AX` and the remainder in `DX`.
Opcode: `F7 /6` Mnemonic: `DIV r/m16` Encoding: `m` Validity (16/32/64 bit): valid, valid, valid Perform an unsigned divide of `DX:AX` by r/m16. Store the quotient in `AX` and the remainder in `DX`.
`F7 /6` `DIV r/m32`	`m`	Valid	Valid	Valid	Perform an unsigned divide of `EDX:EAX` by r/m32. Store the quotient in `EAX` and the remainder in `EDX`.
Opcode: `F7 /6` Mnemonic: `DIV r/m32` Encoding: `m` Validity (16/32/64 bit): valid, valid, valid Perform an unsigned divide of `EDX:EAX` by r/m32. Store the quotient in `EAX` and the remainder in `EDX`.
`REX.W F7 /6` `DIV r/m64`	`m`	N/E	N/E	Valid	Perform an unsigned divide of `RDX:RAX` by r/m64. Store the quotient in `RAX` and the remainder in `RDX`.
Opcode: `REX.W F7 /6` Mnemonic: `DIV r/m64` Encoding: `m` Validity (16/32/64 bit): N/E, N/E, valid Perform an unsigned divide of `RDX:RAX` by r/m64. Store the quotient in `RAX` and the remainder in `RDX`.

Encoding

Encoding	Operand
`m`	`ModRM.r/m[rw]`

Description

The DIV instruction performs an unsigned divide by the operand. For 8-bit operand size, the dividend is located AH, and the quotient is stored AL and the remainder in AH. For non-8-bit operand sizes, the located in the rDX:rAX register pair, and the quotient is stored in rAX and the remainder in rDX.

Non-integral results are truncated ("chopped") towards zero. Overflow is indicated by the #DE exception rather than EFLAGS.CF.

Operation

public void DIV(U8 divisor)
{
    if (divisor is 0)
        #DE;

    U16 al = AX / divisor;
    U16 ah = AX % divisor;
    if (ah > 0xFF)
        #DE;
    AL = (U8)al;
    AH = (U8)ah;
}
public void DIV(U16 divisor)
{
    if (divisor is 0)
        #DE;

    U32 ax = DX:AX / divisor;
    U32 dx = DX:AX % divisor;
    if (ax > 0xFFFF)
        #DE;
    AX = (U16)ax;
    DX = (U16)dx;
}
public void DIV(U32 divisor)
{
    if (divisor is 0)
        #DE;

    U64 eax = EDX:EAX / divisor;
    U64 edx = EDX:EAX % divisor;
    if (eax > 0xFFFF_FFFF)
        #DE;
    EAX = (U32)eax;
    EDX = (U32)edx;
}
public void DIV(U64 divisor)
{
    if (divisor is 0)
        #DE;

    U128 rax = RDX:RAX / divisor;
    U128 rdx = RDX:RAX % divisor;
    if (rax > 0xFFFF_FFFF_FFFF_FFFF)
        #DE;
    RAX = (U64)rax;
    RDX = (U64)rdx;
}

Flags Affected

CF (carry flag): Undefined.
PF (parity flag): Undefined.
AF (auxiliary flag): Undefined.
ZF (zero flag): Undefined.
SF (sign flag): Undefined.
OF (overflow flag): Undefined.

Intrinsics

None. Auto-generated by compiler.

Exceptions

Real-Address Mode

#DE

If the source operand (divisor) is 0.
If the quotient (result) is too large for the destination register.

#UD

If the
LOCK
prefix is used, but the destination is not a memory operand.

#SS(0)

If a memory operand using the
SS
segment has an effective address that is outside the
SS
segment's limit.

#GP(0)

If a memory operand (using a segment other than
SS
) has an effective address that is outside the segment's limit.

Virtual-8086 Mode

#DE

If the source operand (divisor) is 0.
If the quotient (result) is too large for the destination register.

#UD

If the
LOCK
prefix is used, but the destination is not a memory operand.

#SS(0)

If a memory operand using the
SS
segment has an effective address that is outside the
SS
segment's limit.

#GP(0)

If a memory operand (using a segment other than
SS
) has an effective address that is outside the segment's limit.

#PF(fc)

If a page fault occurs.

#AC(0)

If alignment checking is enabled while the current privilege level is 3 and an unaligned memory access is made.

Protected Mode

#DE

If the source operand (divisor) is 0.
If the quotient (result) is too large for the destination register.

#UD

If the
LOCK
prefix is used, but the destination is not a memory operand.

#SS(0)

If a memory operand using the
SS
segment has an effective address that is outside the
SS
segment's limit.

#GP(0)

If the destination is located in a non-writable segment.
If a memory operand uses a segment containing a NULL selector.
If a memory operand (using a segment other than SS) has an effective address that is outside the segment's limit.

#PF(fc)

If a page fault occurs.

#AC(0)

If alignment checking is enabled while the current privilege level is 3 and an unaligned memory access is made.

Compatibility Mode

#DE

If the source operand (divisor) is 0.
If the quotient (result) is too large for the destination register.

#UD

If the
LOCK
prefix is used, but the destination is not a memory operand.

#SS(0)

If a memory operand using the
SS
segment has an effective address that is outside the
SS
segment's limit.

#GP(0)

If the destination is located in a non-writable segment.
If a memory operand uses a segment containing a NULL selector.
If a memory operand (using a segment other than SS) has an effective address that is outside the segment's limit.

#PF(fc)

If a page fault occurs.

#AC(0)

If alignment checking is enabled while the current privilege level is 3 and an unaligned memory access is made.

Long Mode

#DE

If the source operand (divisor) is 0.
If the quotient (result) is too large for the destination register.

#UD

If the
LOCK
prefix is used, but the destination is not a memory operand.

#SS(0)

If a memory operand using the SS segment is in non-canonical form.
If a memory operand using the SS segment has an effective address that is outside the SS segment's limit.

#GP(0)

If a memory operand (using a segment other than SS) is in non-canonical form.
If the destination is located in a non-writable segment.
If a memory operand uses a segment containing a NULL selector.
If a memory operand (using a segment other than SS) has an effective address that is outside the segment's limit.

#PF(fc)

If a page fault occurs.

#AC(0)

If alignment checking is enabled while the current privilege level is 3 and an unaligned memory access is made.