Opcode | Encoding | 16-bit | 32-bit | 64-bit | CPUID Feature Flag(s) | Description |
---|---|---|---|---|---|---|
66 0F 78 /0 iw EXTRQ xmm1, imm16 | mi | Invalid | Valid | Valid | sse4a | Extract the low quadword from xmm1, shift right by imm16[13:8] bits, then clear any bits above position imm16[5:0]. Store the result in xmm1. |
66 0F 79 /r EXTRQ xmm1, xmm2 | mr | Invalid | Valid | Valid | sse4a | Extract the low quadword from xmm1, shift right by xmm2[13:8] bits, then clear any bits above position xmm2[5:0]. Store the result in xmm1. |
Encoding
Encoding | Operand 1 | Operand 2 |
---|---|---|
mi | ModRM.r/m[rw] | imm16 |
mr | ModRM.r/m[rw] | ModRM.reg[r] |
Description
The EXTRQ
extracts a quadword from the destination operand, and using the source operand as a control, shifts and masks the value. The resulting value is then stored in the destination operand.
Operation
public void EXTRQ_Immediate(SimdU64 dest, U16 src)
{
byte shift = (byte)((src >> 8) & 0xFF);
byte maskCount = (byte)(src & 0xFF);
ulong mask = (1u << maskCount) - 1;
dest[0] = (dest[0] >> shift) & mask;
}
public void EXTRQ_Vector(SimdU64 dest, SimdU64 src)
{
byte shift = (byte)((src[0] >> 8) & 0xFF);
byte maskCount = (byte)(src[0] & 0xFF);
ulong mask = (1u << maskCount) - 1;
dest[0] = (dest[0] >> shift) & mask;
}